process of Manufacturing Multi – layer PCB Boards: Analysis of 12 Core Procedures from Base Materials to Finished Products

I. Pre – preparation Stage: Base – material Selection and Design Conversion (Procedures 1 – 2)

1. Base – material Cutting and Pretreatment (Procedure 1)
   • Operation Details: Select high – Tg FR – 4 copper – clad laminates (Tg≥170℃, copper – foil thickness of 1oz/35μm). Cut them to the designed size (such as 600mm×500mm) using a CNC cutting machine, with an error controlled within ±0.1mm. After cutting, remove surface oil stains with an ultrasonic cleaner (40℃ neutral cleaning agent), and then bake in an oven at 120℃ for 2 hours to reduce the water absorption rate to ≤0.04%, avoiding bubbles in subsequent lamination.
   • Key Standards: The base – material edges should have no burrs (burr height ≤ 5μm), and the copper – foil surface should have no oxidation spots to ensure the adhesion of the subsequent photosensitive film.
2. Design File Conversion and Film Making (Procedure 2)
   • Operation Details: Import the PCB design file (Gerber format) into CAM software to generate film patterns for inner – layer, outer – layer circuits, and the solder – mask layer. The films are made using a high – precision laser phototypesetter with a line – width accuracy of ±2μm to ensure the patterns match the design. At the same time, create a drilling file, marking the aperture and position of blind holes, buried holes, and through – holes (such as a 0.2mm blind hole for interconnection between inner layers 1 – 2).
   • Quality Control: The films need to be inspected by a densitometer. The optical density in the light – transmitting area should be ≤0.15, and in the light – blocking area, it should be ≥4.0 to avoid pattern distortion during exposure.

II. Inner – layer Circuit Manufacturing Stage: Building the Core Conductive Layers (Procedures 3 – 5)

3. Photosensitive Film Coating and Exposure (Procedure 3)
   • Operation Details: On the surface of the pretreated copper – clad laminate, evenly coat a photosensitive film (thickness of 15 – 20μm) by roll – coating at a speed of 1.5m/min. Put it in an oven at 60℃ for 30 minutes of pre – baking to semi – cure the photosensitive film. Then cover the base material with the film and expose it with a UV exposure machine (energy of 80 – 100mJ/cm²) to cure the photosensitive film in the light – transmitting areas, forming the embryonic form of the circuit pattern.
   • Process Adaptation: For high – precision inner – layer circuits of multi – layer boards, Laser – direct Imaging (LDI) technology is preferred over traditional film exposure. The positioning accuracy can reach ±1μm, suitable for fine – line – width requirements of less than 0.1mm.
4. Development and Etching (Procedure 4)
   • Operation Details: Put the exposed base material into a developing solution (1.0 – 1.2% sodium carbonate solution, temperature of 30 – 35℃) and soak for 3 – 5 minutes to remove the uncured photosensitive film, exposing the copper foil to be etched. Then send it to an acidic etchant (copper chloride concentration of 180 – 200g/L, temperature of 45℃) with an etching speed of 1.2 – 1.5μm/min until the base – material surface is exposed, forming complete inner – layer circuits.
   • Precision Control: Compensate for under – etching (for example, if the designed line – width is 0.1mm, make it 0.11mm in practice) to offset the side – etching effect, ensuring the final line – width deviation is ≤±3μm. After etching, remove the remaining photosensitive film with a 5% sodium hydroxide solution.
5. Inner – layer AOI Inspection (Procedure 5)
   • Operation Details: Use an Automated Optical Inspection (AOI) device to take high – definition photos of the inner – layer circuits and compare them with the design pattern to detect open – circuits, short – circuits, abnormal line – widths, pinholes, etc. Defect determination criteria: An open – circuit area ≥ 0.01mm² or a short – circuit spacing ≤ 0.05mm needs to be marked for rework.
   • Data Recording: The inspection data of each inner – layer board needs to be uploaded to the MES system in real – time. When the qualification rate is lower than 98%, stop the machine to check if the etching parameters (such as etchant concentration, temperature) are abnormal.

III. Lamination and Interconnection Stage: Achieving Multi – layer Structure and Conductivity (Procedures 6 – 8)

6. Lamination Assembly and Pre – alignment (Procedure 6)
   • Operation Details: Stack in the order of “inner – layer circuit board – prepreg (PP, thickness of 0.1 – 0.2mm) – inner – layer circuit board – prepreg – outer copper – clad laminate” (for an 8 – layer board, the stacking order is: outer copper foil→PP→inner layer 1→PP→inner layer 2→PP→inner layer 3→PP→inner layer 4→PP→outer copper foil). Place positioning pins at the edge of each layer and pre – align through an optical positioning system (reference – hole positioning) to ensure the inter – layer alignment deviation is ≤±2μm.
   • Material Adaptation: The prepreg should have the same resin composition as the base material (such as FR – 4 base material with FR – 4 prepreg) to avoid poor inter – layer bonding. The resin content of the prepreg is controlled at 50 – 60% to ensure no bubbles or resin overflow after lamination.
7. Vacuum Lamination (Procedure 7)
   • Operation Details: Send the stacked body to a vacuum laminator and execute a step – by – step temperature – and – pressure control program:
     • Pre – heating Stage: At 80℃, with a pressure of 10kg/cm², maintain for 30 minutes to expel the air between layers.
     • Pressurization and Curing: Raise the temperature to 150℃, increase the pressure to 25kg/cm², and maintain for 40 minutes to make the prepreg resin melt and flow, bonding each layer.
     • Complete Curing: Raise the temperature to 180℃, with a pressure of 30kg/cm², maintain for 60 minutes to ensure the resin is fully cross – linked.
   • Key Monitoring: During lamination, the vacuum degree should be ≤10mbar, and the temperature uniformity should be ±3℃ to avoid inter – layer delamination or thickness deviation due to uneven pressure.
8. Drilling and Desmear (Procedure 8)
   • Operation Details:
     • Drilling: According to the drilling file, use a CNC drilling machine (rotation speed of 60000 – 80000r/min) to process through – holes, blind holes, and buried holes. The diameter of through – holes is usually 0.3 – 0.5mm, and that of blind holes is 0.15 – 0.2mm. For blind holes, use a “laser drilling + mechanical drilling” composite process. First, use a laser to penetrate the surface layer, and then use a mechanical drill to reach the target layer to avoid piercing the bottom – layer circuit.
     • Desmear: Put the drilled substrate into an alkaline potassium permanganate solution (temperature of 70 – 80℃) and soak for 5 – 8 minutes to remove the resin residue and carbonized layer on the hole wall, ensuring the reliability of subsequent via metallization.
   • Quality Inspection: Check the aperture deviation (≤±0.01mm) and hole – position deviation (≤±0.02mm) through an optical microscope, with no broken drills or misaligned holes.

IV. Outer – layer Processing and Shaping Stage: Completing Conductivity and Protection (Procedures 9 – 11)

9. Via Metallization (Procedure 9)
   • Operation Details:
     • Electroless Copper Plating: Put the substrate into an electroless copper – plating solution (copper sulfate concentration of 15g/L, temperature of 25 – 30℃). Through a chemical reaction, deposit a thin layer of copper (thickness of 0.5 – 1μm) on the hole wall to ensure the hole wall is conductive.
     • Electroplating Thickening: Use vertical electro – plating technology with a current density of 1 – 1.5A/dm² and an electro – plating time of 60 – 90 minutes to thicken the copper layer on the hole wall to 20 – 25μm. At the same time, electro – plate and thicken the outer copper – foil surface to 50μm (to improve current – carrying capacity).
     • Post – electro – plating Cleaning: Rinse with deionized water to remove the residual liquid on the surface and avoid copper – layer corrosion.
   • Reliability Assurance: After via metallization, test the hole resistance (≤50mΩ) and peel strength (≥1.5kg/cm) to ensure stable inter – layer conductivity.
10. Outer – layer Circuit Manufacturing and Solder – mask Layer Printing (Procedure 10)
    • Operation Details:
      • Outer – layer Circuits: Repeat the inner – layer circuit manufacturing process (photosensitive film coating → exposure → development → etching) to form outer – layer conductive circuits. The outer – layer circuits need to be accurately connected to the inner – layer circuits through metallized holes to avoid misalignment.
      • Solder – mask Layer Printing: Use screen – printing to print solder – mask ink (such as green solder – mask ink, thickness of 20 – 30μm) on the substrate surface, covering non – pad areas. After printing, put it in an oven at 150℃ for 60 minutes of curing to ensure the ink adhesion (cross – cut test ≥ 5B), preventing circuit oxidation and short – circuits.
    • Special Treatment: For pad areas that need to be soldered, reserve openings. The opening size should be 0.1 – 0.2mm larger than the pads to ensure the solder can fully cover during soldering.
11. Surface Treatment and Shape Processing (Procedure 11)
    • Operation Details:
      • Surface Treatment: For pad areas, use gold – plating (gold – layer thickness of 2 – 5μm, nickel – layer of 5 – 10μm), tin – plating, or OSP (Organic Solderability Preservative) treatment. Gold – plating is suitable for high – frequency and high – reliability scenarios (such as server PCBs), and OSP is cost – effective and suitable for ordinary consumer electronics.
      • Shape Processing: Cut the substrate according to the designed shape using a CNC milling machine (rotation speed of 20000r/min) or laser cutting (suitable for complex shapes), with a cutting error of ≤±0.1mm. At the same time, process mounting holes (such as 3mm screw holes) to ensure aperture accuracy.
    • Edge Treatment: After cutting, sand the edges of the substrate with sandpaper to remove burrs and avoid scratching components during assembly.

V. Finished – product Inspection and Delivery Stage: Ensuring Performance Compliance (Procedure 12)

12. Finished – product Inspection and Packaging (Procedure 12)
    • Operation Details:
      • Electrical Performance Testing: Use a flying – probe tester to test the conductivity of all circuits (open – circuit test voltage of 500V, insulation resistance ≥ 10¹⁰Ω) and impedance (such as a 50Ω single – ended impedance deviation of ≤±5%).
      • Appearance Inspection: Use AOI to inspect the solder – mask layer for bubbles, exposed copper, color differences, and ensure the pads have no oxidation or deformation.
      • Reliability Testing: Sample for temperature – cycling tests (-40℃~125℃, 1000 cycles), damp – heat tests (85℃/85% RH, 1000h). After testing, there should be no delamination, cracking, and no significant attenuation in electrical performance.
      • Packaging: Pack qualified products in anti – static bags, and place desiccants in each bag to avoid moisture during transportation.
    • Delivery Standard: Each batch of products should be accompanied by an inspection report, including electrical performance data and reliability test results. The qualification rate must reach over 99% before they can be delivered