{"id":1227,"date":"2025-09-27T23:09:01","date_gmt":"2025-09-27T15:09:01","guid":{"rendered":"https:\/\/ulpcb.com\/?p=1227"},"modified":"2025-09-27T23:09:01","modified_gmt":"2025-09-27T15:09:01","slug":"multi-layer-pcb-boards","status":"publish","type":"post","link":"https:\/\/ulpcb.com\/es\/multi-layer-pcb-boards\/","title":{"rendered":"process of Manufacturing Multi – layer PCB Boards: Analysis of 12 Core Procedures from Base Materials to Finished Products"},"content":{"rendered":"
Multi – layer PCB boards<\/a> (usually referring to those with 4 layers or more), with the advantages of high – density wiring and small size, have become the core carriers for smartphones, servers, and automotive electronics. Their manufacturing process goes through three major stages: “inner – layer circuit formation – inter – layer interconnection – outer – layer processing”, involving 12 core procedures. The precision control of each step directly affects the electrical performance and reliability of the final product. Taking an 8 – layer FR – 4 PCB board as an example, its complete manufacturing cycle is about 7 – 10 days. Leading enterprises in the industry can stabilize the yield above 95% through automated equipment.<\/div>\n

I. Pre – preparation Stage: Base – material Selection and Design Conversion (Procedures 1 – 2)<\/h3>\n
    \n
  1. Base – material Cutting and Pretreatment (Procedure 1)<\/strong>\n
      \n
    • Operation Details<\/strong>: Select high – Tg FR – 4 copper – clad laminates (Tg\u2265170\u2103, copper – foil thickness of 1oz\/35\u03bcm). Cut them to the designed size (such as 600mm\u00d7500mm) using a CNC cutting machine, with an error controlled within \u00b10.1mm. After cutting, remove surface oil stains with an ultrasonic cleaner (40\u2103 neutral cleaning agent), and then bake in an oven at 120\u2103 for 2 hours to reduce the water absorption rate to \u22640.04%, avoiding bubbles in subsequent lamination.<\/li>\n
    • Key Standards<\/strong>: The base – material edges should have no burrs (burr height \u2264 5\u03bcm), and the copper – foil surface should have no oxidation spots to ensure the adhesion of the subsequent photosensitive film.<\/li>\n<\/ul>\n<\/li>\n
    • Design File Conversion and Film Making (Procedure 2)<\/strong>\n
        \n
      • Operation Details<\/strong>: Import the PCB design file (Gerber format) into CAM software to generate film patterns for inner – layer, outer – layer circuits, and the solder – mask layer. The films are made using a high – precision laser phototypesetter with a line – width accuracy of \u00b12\u03bcm to ensure the patterns match the design. At the same time, create a drilling file, marking the aperture and position of blind holes, buried holes, and through – holes (such as a 0.2mm blind hole for interconnection between inner layers 1 – 2).<\/li>\n
      • Quality Control<\/strong>: The films need to be inspected by a densitometer. The optical density in the light – transmitting area should be \u22640.15, and in the light – blocking area, it should be \u22654.0 to avoid pattern distortion during exposure.<\/li>\n<\/ul>\n<\/li>\n<\/ol>\n

        II. Inner – layer Circuit Manufacturing Stage: Building the Core Conductive Layers (Procedures 3 – 5)<\/h3>\n
          \n
        1. Photosensitive Film Coating and Exposure (Procedure 3)<\/strong>\n
            \n
          • Operation Details<\/strong>: On the surface of the pretreated copper – clad laminate, evenly coat a photosensitive film (thickness of 15 – 20\u03bcm) by roll – coating at a speed of 1.5m\/min. Put it in an oven at 60\u2103 for 30 minutes of pre – baking to semi – cure the photosensitive film. Then cover the base material with the film and expose it with a UV exposure machine (energy of 80 – 100mJ\/cm\u00b2) to cure the photosensitive film in the light – transmitting areas, forming the embryonic form of the circuit pattern.<\/li>\n
          • Process Adaptation<\/strong>: For high – precision inner – layer circuits of multi – layer boards, Laser – direct Imaging (LDI) technology is preferred over traditional film exposure. The positioning accuracy can reach \u00b11\u03bcm, suitable for fine – line – width requirements of less than 0.1mm.<\/li>\n<\/ul>\n<\/li>\n
          • Development and Etching (Procedure 4)<\/strong>\n
              \n
            • Operation Details<\/strong>: Put the exposed base material into a developing solution (1.0 – 1.2% sodium carbonate solution, temperature of 30 – 35\u2103) and soak for 3 – 5 minutes to remove the uncured photosensitive film, exposing the copper foil to be etched. Then send it to an acidic etchant (copper chloride concentration of 180 – 200g\/L, temperature of 45\u2103) with an etching speed of 1.2 – 1.5\u03bcm\/min until the base – material surface is exposed, forming complete inner – layer circuits.<\/li>\n
            • Precision Control<\/strong>: Compensate for under – etching (for example, if the designed line – width is 0.1mm, make it 0.11mm in practice) to offset the side – etching effect, ensuring the final line – width deviation is \u2264\u00b13\u03bcm. After etching, remove the remaining photosensitive film with a 5% sodium hydroxide solution.<\/li>\n<\/ul>\n<\/li>\n
            • Inner – layer AOI Inspection (Procedure 5)<\/strong>\n
                \n
              • Operation Details<\/strong>: Use an Automated Optical Inspection (AOI) device to take high – definition photos of the inner – layer circuits and compare them with the design pattern to detect open – circuits, short – circuits, abnormal line – widths, pinholes, etc. Defect determination criteria: An open – circuit area \u2265 0.01mm\u00b2 or a short – circuit spacing \u2264 0.05mm needs to be marked for rework.<\/li>\n
              • Data Recording<\/strong>: The inspection data of each inner – layer board needs to be uploaded to the MES system in real – time. When the qualification rate is lower than 98%, stop the machine to check if the etching parameters (such as etchant concentration, temperature) are abnormal.<\/li>\n<\/ul>\n<\/li>\n<\/ol>\n

                III. Lamination and Interconnection Stage: Achieving Multi – layer Structure and Conductivity (Procedures 6 – 8)<\/h3>\n
                  \n
                1. Lamination Assembly and Pre – alignment (Procedure 6)<\/strong>\n
                    \n
                  • Operation Details<\/strong>: Stack in the order of “inner – layer circuit board – prepreg (PP, thickness of 0.1 – 0.2mm) – inner – layer circuit board – prepreg – outer copper – clad laminate” (for an 8 – layer board, the stacking order is: outer copper foil\u2192PP\u2192inner layer 1\u2192PP\u2192inner layer 2\u2192PP\u2192inner layer 3\u2192PP\u2192inner layer 4\u2192PP\u2192outer copper foil). Place positioning pins at the edge of each layer and pre – align through an optical positioning system (reference – hole positioning) to ensure the inter – layer alignment deviation is \u2264\u00b12\u03bcm.<\/li>\n
                  • Material Adaptation<\/strong>: The prepreg should have the same resin composition as the base material (such as FR – 4 base material with FR – 4 prepreg) to avoid poor inter – layer bonding. The resin content of the prepreg is controlled at 50 – 60% to ensure no bubbles or resin overflow after lamination.<\/li>\n<\/ul>\n<\/li>\n
                  • Vacuum Lamination (Procedure 7)<\/strong>\n
                      \n
                    • Operation Details<\/strong>: Send the stacked body to a vacuum laminator and execute a step – by – step temperature – and – pressure control program:\n
                        \n
                      • Pre – heating Stage<\/strong>: At 80\u2103, with a pressure of 10kg\/cm\u00b2, maintain for 30 minutes to expel the air between layers.<\/li>\n
                      • Pressurization and Curing<\/strong>: Raise the temperature to 150\u2103, increase the pressure to 25kg\/cm\u00b2, and maintain for 40 minutes to make the prepreg resin melt and flow, bonding each layer.<\/li>\n
                      • Complete Curing<\/strong>: Raise the temperature to 180\u2103, with a pressure of 30kg\/cm\u00b2, maintain for 60 minutes to ensure the resin is fully cross – linked.<\/li>\n<\/ul>\n<\/li>\n
                      • Key Monitoring<\/strong>: During lamination, the vacuum degree should be \u226410mbar, and the temperature uniformity should be \u00b13\u2103 to avoid inter – layer delamination or thickness deviation due to uneven pressure.<\/li>\n<\/ul>\n<\/li>\n
                      • Drilling and Desmear (Procedure 8)<\/strong>\n
                          \n
                        • Operation Details<\/strong>:\n
                            \n
                          • Drilling<\/strong>: According to the drilling file, use a CNC drilling machine (rotation speed of 60000 – 80000r\/min) to process through – holes, blind holes, and buried holes. The diameter of through – holes is usually 0.3 – 0.5mm, and that of blind holes is 0.15 – 0.2mm. For blind holes, use a “laser drilling + mechanical drilling” composite process. First, use a laser to penetrate the surface layer, and then use a mechanical drill to reach the target layer to avoid piercing the bottom – layer circuit.<\/li>\n
                          • Desmear<\/strong>: Put the drilled substrate into an alkaline potassium permanganate solution (temperature of 70 – 80\u2103) and soak for 5 – 8 minutes to remove the resin residue and carbonized layer on the hole wall, ensuring the reliability of subsequent via metallization.<\/li>\n<\/ul>\n<\/li>\n
                          • Quality Inspection<\/strong>: Check the aperture deviation (\u2264\u00b10.01mm) and hole – position deviation (\u2264\u00b10.02mm) through an optical microscope, with no broken drills or misaligned holes.<\/li>\n<\/ul>\n<\/li>\n<\/ol>\n

                            IV. Outer – layer Processing and Shaping Stage: Completing Conductivity and Protection (Procedures 9 – 11)<\/h3>\n
                              \n
                            1. Via Metallization (Procedure 9)<\/strong>\n
                                \n
                              • Operation Details<\/strong>:\n
                                  \n
                                • Electroless Copper Plating<\/strong>: Put the substrate into an electroless copper – plating solution (copper sulfate concentration of 15g\/L, temperature of 25 – 30\u2103). Through a chemical reaction, deposit a thin layer of copper (thickness of 0.5 – 1\u03bcm) on the hole wall to ensure the hole wall is conductive.<\/li>\n
                                • Electroplating Thickening<\/strong>: Use vertical electro – plating technology with a current density of 1 – 1.5A\/dm\u00b2 and an electro – plating time of 60 – 90 minutes to thicken the copper layer on the hole wall to 20 – 25\u03bcm. At the same time, electro – plate and thicken the outer copper – foil surface to 50\u03bcm (to improve current – carrying capacity).<\/li>\n
                                • Post – electro – plating Cleaning<\/strong>: Rinse with deionized water to remove the residual liquid on the surface and avoid copper – layer corrosion.<\/li>\n<\/ul>\n<\/li>\n
                                • Reliability Assurance<\/strong>: After via metallization, test the hole resistance (\u226450m\u03a9) and peel strength (\u22651.5kg\/cm) to ensure stable inter – layer conductivity.<\/li>\n<\/ul>\n<\/li>\n
                                • Outer – layer Circuit Manufacturing and Solder – mask Layer Printing (Procedure 10)<\/strong>\n
                                    \n
                                  • Operation Details<\/strong>:\n
                                      \n
                                    • Outer – layer Circuits<\/strong>: Repeat the inner – layer circuit manufacturing process (photosensitive film coating \u2192 exposure \u2192 development \u2192 etching) to form outer – layer conductive circuits. The outer – layer circuits need to be accurately connected to the inner – layer circuits through metallized holes to avoid misalignment.<\/li>\n
                                    • Solder – mask Layer Printing<\/strong>: Use screen – printing to print solder – mask ink (such as green solder – mask ink, thickness of 20 – 30\u03bcm) on the substrate surface, covering non – pad areas. After printing, put it in an oven at 150\u2103 for 60 minutes of curing to ensure the ink adhesion (cross – cut test \u2265 5B), preventing circuit oxidation and short – circuits.<\/li>\n<\/ul>\n<\/li>\n
                                    • Special Treatment<\/strong>: For pad areas that need to be soldered, reserve openings. The opening size should be 0.1 – 0.2mm larger than the pads to ensure the solder can fully cover during soldering.<\/li>\n<\/ul>\n<\/li>\n
                                    • Surface Treatment and Shape Processing (Procedure 11)<\/strong>\n
                                        \n
                                      • Operation Details<\/strong>:\n
                                          \n
                                        • Surface Treatment<\/strong>: For pad areas, use gold – plating (gold – layer thickness of 2 – 5\u03bcm, nickel – layer of 5 – 10\u03bcm), tin – plating, or OSP (Organic Solderability Preservative) treatment. Gold – plating is suitable for high – frequency and high – reliability scenarios (such as server PCBs), and OSP is cost – effective and suitable for ordinary consumer electronics.<\/li>\n
                                        • Shape Processing<\/strong>: Cut the substrate according to the designed shape using a CNC milling machine (rotation speed of 20000r\/min) or laser cutting (suitable for complex shapes), with a cutting error of \u2264\u00b10.1mm. At the same time, process mounting holes (such as 3mm screw holes) to ensure aperture accuracy.<\/li>\n<\/ul>\n<\/li>\n
                                        • Edge Treatment<\/strong>: After cutting, sand the edges of the substrate with sandpaper to remove burrs and avoid scratching components during assembly.<\/li>\n<\/ul>\n<\/li>\n<\/ol>\n

                                          V. Finished – product Inspection and Delivery Stage: Ensuring Performance Compliance (Procedure 12)<\/h3>\n
                                            \n
                                          1. Finished – product Inspection and Packaging (Procedure 12)<\/strong>\n
                                              \n
                                            • Operation Details<\/strong>:\n
                                                \n
                                              • Electrical Performance Testing<\/strong>: Use a flying – probe tester to test the conductivity of all circuits (open – circuit test voltage of 500V, insulation resistance \u2265 10\u00b9\u2070\u03a9) and impedance (such as a 50\u03a9 single – ended impedance deviation of \u2264\u00b15%).<\/li>\n
                                              • Appearance Inspection<\/strong>: Use AOI to inspect the solder – mask layer for bubbles, exposed copper, color differences, and ensure the pads have no oxidation or deformation.<\/li>\n
                                              • Reliability Testing<\/strong>: Sample for temperature – cycling tests (-40\u2103~125\u2103, 1000 cycles), damp – heat tests (85\u2103\/85% RH, 1000h). After testing, there should be no delamination, cracking, and no significant attenuation in electrical performance.<\/li>\n
                                              • Packaging<\/strong>: Pack qualified products in anti – static bags, and place desiccants in each bag to avoid moisture during transportation.<\/li>\n<\/ul>\n<\/li>\n
                                              • Delivery Standard<\/strong>: Each batch of products should be accompanied by an inspection report, including electrical performance data and reliability test results. The qualification rate must reach over 99% before they can be delivered<\/li>\n<\/ul>\n<\/li>\n<\/ol>","protected":false},"excerpt":{"rendered":"

                                                Multi – layer PCB boards (usually referring to those with 4 layers or more), with the advantages of high –<\/p>","protected":false},"author":1,"featured_media":973,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-1227","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"_links":{"self":[{"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/posts\/1227","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/comments?post=1227"}],"version-history":[{"count":1,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/posts\/1227\/revisions"}],"predecessor-version":[{"id":1228,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/posts\/1227\/revisions\/1228"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/media\/973"}],"wp:attachment":[{"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/media?parent=1227"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/categories?post=1227"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ulpcb.com\/es\/wp-json\/wp\/v2\/tags?post=1227"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}